Gate 2006 Questions on Electronic Devices

GATE – 2006 (1 mark)

Question 1.

The value of voltage (VD) across a tunnel – diode corresponding to peak and valley currents are Vpand Vv respectively . The range of tunnel – diode voltage VD for which the slope of its I – VD characteristics is negative would be

a)VD < 0

b)0 ≤ VD < Vp

c)Vp≤ VD<Vv

d)VD ≥ Vv

Answer : c

(diagram)

Question 2:

The concentration of minority carriers in an extrinsic semiconductor under equilibrium is

a) directly proportional to the doping concentration.

b)inversely proportional to the doping concentration.

c)directly proportional to the intrinsic concentration.

d)inversely proportional to the intrinsic concentration.

Answer : b

Explanation

np = ni2

ni= constant

For n- type p is minority carrier concentration

P = ni2n , P ∝ 1n

Question 3:

Under low level injection assumption , the injection minority carrier current for an extrinsic semiconductor is essentially the

a) diffusion current .

b)drift current.

c)recombination current .

d)induced current.

Answer : a

Question 4:

The phenomenon known as” Early Effect” in a bipolar transistor refers to reduction of the effective base – width caused by

a)electron - hole recombination at the base.

b)the reverse biasing of the base – collector junction.

c)the forward biasing of emitter – base junction .

d)the early removal of the stored base charge during saturation – to – cutoff switching .

Answer : b

Gate 2006 (2 mark)

Question 1

In the circuit shown below , the switch was connected to position 1 at t< 0 and at t = 0 , it is changed to position 2 . Assume that the diode has zero voltage drop and a storage time ts .For 0 < t ≤ ts, VR is given by ( all in volts )(diagram)

a) = -5

b) = +5

c)0 ≤VR < 5

d) -5 < VR < 0

Answer : a

Explanation

Diode retains resistance of forward bias condition in reverse bias (ideally zero resistance ) for the time interval of storage time.

So , VR= -5 V

Question 2

The majority carriers in n- type semiconductor have an average drift velocity V in a direction perpendicular to a uniform magnetic to field B .The electric field E induced due Hall effect acts in the direction

a) v * B

b)B * v

c)along v

d)opposite to v

Answer : b

Explanation:

Hall effect

Electric force + magnetic force = 0

qE +qv * B = 0

E = -v * B

E = B * v

Question 3

Find the correct match between group 1 and group 2

Group 1

E : Varactor diode

F : PIN diode

G : Zener diode

H : Schottky diode

Group 2

1. Voltage reference

2. High – frequency switch

3. Tuned circuits

4. Current controlled attenuator .

a) E – 4,F – 2 ,G – 1 ,H – 3.

b)E – 2,F – 4 ,G – 1 ,H – 3.

c)E – 3 ,F – 4, G – 1 ,H – 2.

d)E – 1,F – 3 ,G – 2 ,H – 4.

Answer : c

Question 4:

A heavily doped n – typed semiconductor has the following data :

Hole electron mobility ratio : 0.4

Doping concentration : 4.2 * 103 atoms/m3

Intrinsic concentration :1.5 * 104atoms/m3

The ratio of conductance of the n- type semiconductor to that of intrinsic semiconductor of same material and at the same temperature is given by

a)0.00005

b)2,000

c)10,000

d)20,000

Answer : d

Explanation

For n –type semiconductor σi = nqµn

For intrinsic semiconductor ,

σi = niq(µn+µp)

σnσi = nµnni( µn+µp)

= 4.2*108*µn1.5*104*µn ( 1+ µpµn)

= 4.2*1081.5*104*1.4 = 2 * 104

Gate 2005 questions on Electronic Devices

Gate 2005 (1 mark)

Question 1 

The band gap of silicon at room temperature

a)1.3 eV

b)0.7 eV

c)1.1 eV

d)1.4 eV

Answer : c

 

Question 2:

A silicon PN junction at a temperature of 20℃ has a reverse saturation current of 10 pico – Amperes (pA) . The reverse saturation current at 40℃ for the same bias approximately

a)30 pA

b)40 pA

c)50 pA

d)60 pA

Answer : b

Explanation:

For every 10℃ rise in temperature reverse saturation current doubles according to the following equation

ID(T) = Io1* 2(T- T1)/ 10

 

Question 3:

The primary reason for the widespread use of silicon in semiconductor device technology is

a)abundance of silicon on the surface of the earth.

b)large band gap of silicon in comparison to Germanium.

c)favorable properties of silicon – dioxide (SiO2).

d)lower melting point.

Answer  : a

Gate 2005 (2 marks)

Question 1

An silicon sample A is doped with 1018 atoms/ cm3 of Boron . Another sample B of identical dimensions is doped with 1018 atoms/ cm3 of Phosphorus. The ratio of electron to hole mobility is 3. The ratio of conductivity of the sample A to B is

a)3

b)1/3

c)2/3

d)3/2

Answer : b

Explanation:

σn = nqµn

σpσn = µpµn = 13

Question 2: 

A silicon PN junction diode under reverse bias has depletion region of width 10µm. The relative permittivity of silicon , εr = 11.7 and the permittivity of free space ,εo = 8.85 * 10-12 F/ m . The depletion capacitance of the diode per square meter is

a)100 µF

b)10 µF

c)1 µF

d)20 µF

Answer : b

Explanation

C = ε0εr Ad

CA = 8.85*10-12*11.710*10-6

=10.35µF 

Question 3: 

A MOS capacitor made using p – type substrate is in the accumulation mode. The dominant charge in the channel is due to the presence of

a)holes

b)electrons

c)positively charged ions

d)negatively charged ions

Answer : a

Explanation

In accumulation mode for NMOS having p – substrate VG is –ve . when negative VG is applied to gate electrode , the holes in the p – type substrate are attracted to the semiconductor oxide interface . This condition is called carrier accumulation on the surface.

Gate 2004 Questions on Electronic Devices

Gate 2004 (2 marks)

Question 3:

Consider an abrupt p – junction. Let Vbi be the built – in potential of the junction and VR be the applied reverse bias. If the junction capacitance (Cj) is 1 pF for Vbi+VR= 1V ,then for Vbi+VR = 4 V , Cjwill be

a)4pF

b)2pF

c)0.25pF

d)0.5pF

Answer : d

Explanation:

Cj ∝ Vj-1/2

Cj2Cj1 =V1V2 =14 =12

Cj2 =Cj22 = 1pF2 = 0.5pF

Question 4:

Consider the following statement S1and S2

S1 : The threshold voltage (VT)of MOS capacitor decreases with increases in the gate oxide thickness.

S2 : The threshold voltage (VT)of MOS capacitor decreases with increases in the substrate doping concentration.

Which one of the following is correct ?

a)S1 is false and S2 is true.

b)both S1 and S2are true.

c)both S1 and S2 are false.

d)S1 is true and S2 is false.

Answer : d

Explanation:

S2 : VT of N-MOS is increased by adding extra p – type impurities i.e. VT of a MOS increases by increase in substrate doping concentration .(True)

S1 :Cox = ϵoxtox tox = gate oxide thickeners.

VT = ϕGC-2ϕFQRCox- QoxCox

If Cox increases QBCox and QoxCox decreases and VT increases.

Cox Decreases when tox increases.

Question 5: 

The drain of an n-channel MOSFET is shorted to the gate so that VGS=VDS. The threshold voltage (VT) of MOSFET is 1 V. If drain current (ID) is 1mA for VGS= 2V , then for VGS = 3 V,ID is

a)2mA

b)3mA

c)9mA

d)4mA

Answer : d

Explanation

ID = K (VGS-VT)2

1mA =K (2-1)2

K = 1mA/V2

Again , ID = K (VGs-VT)2

= 1mAV2 (3-1)2 *V2

ID = 4mA

Question 6:

The longest wavelength that can be absorbed by silicon , which has the band width of 1.12 eV is 1.1µm . If the longest wavelength that can be absorbed by another material is 0.87 µm , then the band gap of this material is

a)1.416 eV

b)0.886 eV

c)0.854 eV

d)0.706 eV

Answer: b
Explanation

Eg = 1.24λ(μm) eVs

= 1.240.87µm eV = 1.425 eV

Question 7

The neutral base width of a bipolar transistor , biased in an active region , is 0.5µm .The maximum electron concentration and diffusion constant in the base are 1014 /cm3 and Dn = 25 cm3/ sec respectively . Assuming negligible recombination in the base, the collector current density is ( the electron charge is 1.6 * 10-19 coulomb)

a)800 A/cm2

b)8 A/cm2

c)200 A/cm2

d)2 A/cm2

Answer : b

Explanation:

JC = qDndndx

=1.6 *10-19 *25*10140.5*10-4

JC = 8 A/cm2

Gate 2004 Questions on Electronic Devices

Gate 2004 (1 mark )

Question 1

The impurity commonly used for realizing the base region of a silicon n-p-n transistor is

a)Gallium

b)Indium

c)Boron

d)Phosphorus

Answer : c

Question 2

If silicon n-p-n transistor, the base –to –emitter voltage VBE is 0.7 and the collector –to –base voltage VCB is 0.2 V , then the transistor is operating in the

a)normal active mode

b)saturation mode

c)inverse active mode

d)cutoff mode

Answer : a

Question3

Consider the following statement S1and S2

S1: The β of a bipolar transistor reduces if the base width is increased.

S2: The β of a bipolar transistor increases if the doping concentration in the base increased.

Which one of the following is correct?

a)S1is false and S2is true

b) both S1 and S2are true

c)both S1and S2are false

d)S1is true and S2 is false

Answer : d

Explanation:

β = ICIB = α1-α

when base width increases , recombination in base region increases and α decreases & hence β decreases.

If doping in base region increases , then recombination in base increases and α decreases thereby decreasing β.

Question 4

Given figure is the voltage transfer characteristic of (diagram)

a)an NMOS inverter with enhancement mode transistor as load.

b)an NMOS inverter with depletion mode transistor as load.

c)as CMOS inverter.

d)as BJT inverter.

 Answer : c

Gate 2004 (2 marks)

Question1 

In an abrupt p-n junction ,the doping concentration of the p – side and n – side are NA = 9 * 1016/cm3 and ND= 1*1016/cm3 respectively . The p- n junction is reversed biased and the total depletion width is 3μm. The depletion width on the p- side is

a)2.7μm

b)0.3μm

c)2.25μm

d)0.75μm

Answer : b

Explanation:

ωnωp = NAND ω ≅ ωn (ωn≫ωp)

ωp = ωn*NDNA = 3µm*10169*1016 = 0.3µm

Question 2 

The resistivity of a uniform doped n – type silicon sample is 0.5Ω - cm. If the electron mobility (µn) is 1250 cm2 / V – sec and the charge of an electron is 1.6 *10-19 coulomb , the donor impurity concentration (ND) in the sample is

a) 2* 1016/cm3

b)1 * 1016/cm3

c)2.5 *1015/cm3

d) 2 * 1015/cm3

Answer : b

Explanation:
ρ = 1nqµn

n = ND

ND = 1qµnρ = 11.6* 10-19*1250*0.5 = 1016 /cm3

Gate 2003 Questions on Electronic Devices

Gate 2003 (2 mark)

Question 1: 

An n- type silicon bar 0.1 cm long and 100µm2 in a cross – sectional area has majority carrier concentration of 5 * 1020/m3 and carrier mobility is 0.13 m2/V-s at 300 k. If the charge of the electron is 1.6 * 1019 coulomb , then the resistance of the bar is,

a)106 ohm

b)104ohm

c)10-1ohm

d)10-4ohm

Answer : a

Explanation:

σ = nqµn

= 5 * 1020 * 1.6 * 10-19* 0.13 = 10.4

ρ = 1σ = 1 / 10.4

R = ρlA = 1*0.1*10-210.4*100*10-12 =106Ω

Question 2.

The electron concentration in a sample of uniformly doped n – type silicon at 300 k various linearly from 1017/cm3 at X = 0 to 6 * 1016/cm3 at X = 2µm . Assume a situation that electron are supplied to keep this concentration gradient constant with time. If electronic charge is 1.6 * 10-19 coulomb and the diffusion constant Dn = 35 cm2/ s, the current density in the silicon ,if no electric field is present ,is

a)zero

b)-1120A/cm2

c)-560A/cm2

d) +1120A/cm2

Answer : b

Explanation:

Jn =nqµeE +Dnqdndx

Here , E = 0

So, Jn =qDndndx

dndx = 6*1016-10172*10-4 = -2*1020

Jn =1.6*10-19*35*(-2*1020)

Jn =-1120A/cm2

Question 3:  

Match items in Group -1 with items in Group – 2, mostly suitable.

Group – 1

P.LED

Q.Avalanche photodiode

R. Tunnel diode

S. LASER

Group -2

1. Heavy doping

2. Coherent radistion

3. Spontaneous emission

4.Current gain

a)P – 1 ;Q – 2 ;R – 4 ;S – 3

b)P – 2 ;Q – 3; R – 1 ;S – 4

c)P – 3 ;Q – 4 ;R – 1 ;S – 2

d)P – 2 ;Q – 1 ;R – 4 ;S – 3

Answer : c

Question 4

A particular green LED emits light of wavelength 5490A°. The energy band gap of the semiconductor material used there is (Planck’s constant = 6.626 * 10-34 J-s)

a)2.26eV

b)1.98eV

c)1.17eV

d)0.74eV

Answer : a

Explanation:

Eg = 1.24λ(μm)

=1.245490*10-4 μm

=2.26eV

Question 5

When the gate – to –source voltage VGS of a MOSFET with threshold voltage of 400 mV, working in saturation is 900 mV, the drain current is observed to be 1 mA. Neglecting the channel width modulation effect and assuming that the MOSFET is operating at saturation , the drain current for an applied VGS of 1400 mV is

a)0.5mA

b)2.0mA

c)3.5mA

d)4.0mA

Answer : d

Explanation

ID = K(VGs - VT)2

1mA =K (900-400)2

K =1mA/V2104*25

When VGS = 1400

ID = K(VGs - VT)2

=1mA25* 104V2 (1400-400)2V2

=1mA*10025*104* 104

ID = 4mA

Question 6:

If P is Passivation ,Q is n – well implant , R is metallization and S is source/ drain diffusion , then the order in which they are carried out in standard n – well CMOS fabrication process , is

a)P –Q –R –S

b)Q –S –R –P

c)R –P –S –Q

d)S –R –Q –P

Answer : b