Gate 2002 and 2003 Questions on Electronic Devices

Gate 2002 (1 mark)
Question: 1

In the figure, silicon diode is carrying a constant current of 1 mA. When the temperature of the diode is 20 ℃, VD is found to be 700 mV. If the temperature rises to 40℃,VD become approximately equal to(diagram)

a)740mv

b)660mV

c)680mV

d)700mV

Answer: b

Explanation

For either Si or Ge dVdt ≅ -2.5 V/℃

In order to maintain a constant value of I.

T2-T1 = 40 – 20= 20℃

-2.5 * 20mV = 50 mV

Therefore, VD = 700 – 50

=650 ≅ 660 mV

Question 2: 

If the transistor in the figure is saturation , then(diagram)

a)IC is always equal to βdcIB

b)Icis always equal to βdcIB

c)Icis greater than or equal to βdcIB

d)Icis less than or equal to βdcIB

Answer : d

Explanation:

Gate 2003 (1 mark)

Question:3 

n- type silicon is obtained by doping silicon with

a)Germanium

b) Aluminium.

c)Boron

d)Phosphorus

Answer : a

Question 4:

The band gap of silicon at 300 k is

a)1.36eV

b)1.10eV

c)0.80eV

d)0.67eV

Answer : b

Quesiton 5

The intrinsic carrier concentration of silicon sample at 300 k is 1.5 *10-6/m-3.If after doping the no of majority carriers is 5 * 1020/m3 , the minority carrier density is

a)4.50 * 1011/m3

b)3.33 * 104/m3

c)5.00*1020/m3

d)3.00 * 10-5/m3

Answer : a

Explanation:

ni2 = np

ni = intrinsic concentration

P = ni2ni =1.5*1016*1.5*1016520

=45*1010 =4.5*1011

Question 6 

choose the correct substitutes for X and Y to make the following statement correct tunnel diode and Avalanche photodiode are operated in X bias and y bias respectively,

a)X :reverse , Y: reverse

b)X:reverse , Y: forward

c)X :forward , Y:reverse

d)X:forward ,Y:forward

Answer: c

Question 7

For an n-channel enhancement type MOSFET , if the source connected at a high potential then that of the bulk ( i.e. VSB> 0) the threshold voltage VT of the MOSFET will

a) remain unchanged

b)decreases

c)change polarity

d)increases

Answer : d

Explanation:

VT =VTo+γ-2ϕF+VSB - 2ϕF

VSB= substrate bias voltage

γ = substrate bias coefficient

Gate 2005, 2006 and 2007 Questions on Microprocessor

Gate- 2005 Two marks Questions

Common data for Questions 10 and 11

Consider an 8085 Microprocessor system
The following program start at location 0100H.
                         LXI SP, 00FF
                         LXI H, 0107
                         MVI A, 20H
                         SUB M

Question 10. The content of accumulator when the program counter when the program counter reaches 0109H is
(a) 20H
(b) 02H
(c) 00H
(d) FFH

Answer: (c)

Explanation:

0100 LXI SP, 00FF
0103 LXI H, 0107
0106 MVI A, 20H
0108 SUB M
0109

M Contains the data of memory whose address which is in HL pair.
HL has address 0107
0107 corresponds to 20H.
therefore A-M=20H-20H = 00H

Question 11.

If in addition following code exists from 0109H onwards,
ORI 40H
ADD M

What will be the result in the accumulator after the last instruction is executed?

(a) 40H
(b) 20H
(c) 60H
(d) 42H

Answer: (c)

Explanation:
After 0109 Accumulator will contain 00H
ORI will execute OR operation between Accumulator and 40H and store the content to Accumulator A = 40H => 00H OR 04H
Now Adding M(20H) with A(40H) gives 60H.

Gate- 2006 Two mark questions

Question 12:

Following is the segment of the 8085 assemble language program
        LXI SP, EFFFH
          CALL 3000H
3000H: LXI H,3CF4H
PUSH PSW
SPHL
POP PSW
RET

On completion of RET execution, the contents of SP is
(a) 3CFOH
(b) 3CF8H
(c) EFFDH
(d) EFFFH

Answer: (b)

Explanation:

Gate 1991, 2001 Questions on Electronic Devices

Gate 1991 (1 mark question):

Question 1:

The Early effect in the bipolar junction transistor is caused by

a)fast turn – on

b)fast turn – off

c)large collator – base reverse bias

d)large emitter – base forward bias

Answer : c

Explanation: Due to reverse bias of collector junction effective base width is less than metallurgical base width and this called Early effect.

Gate 2001(1 mark question) :

Question 2:

MOSFET can be used as a

a)current controlled capacitor

b)voltage controlled capacitor

c)current controlled inductor

d)voltage controlled inductor

Answer : b

Explanation:

Question: 3

The effective channel length of MOSFET in saturation decreases with increase in

a) gate voltage

b)drain voltage

c)source voltage

d)body voltage

Answer : b

Explanation:

At the edge of saturation i.e when drain to source voltage reaches VD sat the inversion layer charge at the drain end become zero(ideally). The channel is said to be pinched off at the drain end. If the drain to source voltage VDS is increased even further beyond the saturation edge so that VDS>VD sat

Gate 2003 & 2004 Questions on Microprocessor

GATE 2003
Two mark Questions:

Question 5:

In an 8085 microprocessor, the instruction CMP B has been executed while the content of the accumulator is less than that of register B. As a result

(a) Carry flag will be set but zero flag will be reset.
(b) Carry flag will be reset but zero flag will be set.
(c) Both Carry flag and zero flag will be reset.
(d) Both Carry flag and zero flag will be set.

Answer: (a)

Explanation:

CMP B -> the contents of B and A are compared and result is indicated by flag.

if(A) < B :: Carry flag is set, Zero flag is reset.

if(A) = B :: Zero flag is set, Carry flag is reset.

if(A) > B :: Carry and Zero flags are reset.

GATE 2004
Two mark Questions.

Question 6:

The 8255 programmable peripheral interface is used as described below.

(i) An A/D converter is interfaced to a microprocessor through an 8255. The conversion is initiated by a signal from the 8255 on Port C. A signal on Port C
     causes data to be strobed into Port A.
(ii) Two computers exchange data using a pair of 8255s. Port A works as a bidirectional data port supported by appropriate handshaking signals.
The appropriate modes of operation of the 8255 for I and II would be

(a) Mode 0 for I and Mode 1 for II
(b) Mode 1 for I and Mode 0 for II
(c) Mode 2 for I and Mode 0 for II
(d) Mode 2 for I and Mode 1 for II

Answer: (d)

Explanation:

Mode '0' doesn't have handshaking facility, only have simple input and output operation facility.
Mode '1' and '2'  have handshaking facility and I/O operation facility too.

Reference:  http://en.wikipedia.org/wiki/Intel_8255

Question 7:

The number of memory cycles required to execute the following 8085 instructions
(I)  LDA 3000H
(II) LXI D, F0F1H
     would be
(a) 2 for (I) and 2 for (II)
(b) 4 for (I) and 3 for (II)
(c) 3 for (I) and 3 for (II)
(d) 3 for (I) and 4 for (II)

Answer: (b)

Explanation:

                     Memory cycles
LDA 3000H --> Fetch, Read, Read, Read
                                    ---------------  --------
                                       address      data

LXI D, F0F1H--> Fetch, Read, Read

Reference: click here

Question 8:

Consider the sequence of 8085 instructions given below:
LXI H, 9258
MOV A, M
CMA
MOV M, A

which one of the following is performed by this sequence?
(a) Contents of location 9258 are moved to the accumulator.
(b) Contents of location 9258 are compared with the contents of accumulator
(c) Contents of location 9258 are complemented and stored in location 9258
(d) Contents of location 5892 are complemented and stored in location 5892

Answer: (c)

Explanation:

LXI H, 9258 => the data is loaded into the Register pair
MOV A, M    => The data in the M(9288) is moved to accumulator
CMA            => The Accumulator data is complemented and stored in            
                          accumulator
MOV M, A   => The data in the Accumulator is stored in M.

Question 9:

It is desired to multiply the numbers 0AH by 0BH and store the result in hte accumulator. The numbers are available in registers B and C respectively. A part of the 8085 program for the purpose is given below:

MVI A 00H
Loop;______
____________
____________
HLT END
The sequence of instruction to the complete the program would be.

(a) JNZ LOOP, ADD B,    DCR C
(b) ADD B, JNZ LOOP,    DCR C
(c) DCR C, JNZ LOOP,     ADD B
(d) ADD B, DCR C,          JNZ LOOP

Answer: d

Explanation:

The question is to multiply two numbers 0AH and 0BH. 
first of all ., In general mathematics the product of 10 and 11 will be equal to 11 times the summation of 10 will be equal to 10 times the summation of 11 which is equal to 110 (i.e) 10*11=10+10+10+10+10+10+10+10+10+10+10=
11+11+11+11+11+11+11+11+11+11=110.

so the program to multiply 0AH and 0B H will be 0BH times the addition of 0AH

Program:


B2001H

Address	Mnemonics	Operand	opcode	Remarks
2000	MVI	A, 00H	3E	Initialize accumulator with 00H
2001			00	Immediate value 00H
2002	ADD	B	80	Add B register(0AH) with Accumulator(00H) and store it in Accumulator
2003	DCR	C	0D	Decrement C
2004	JNZ	2002H	C2	if c is not equal to zero jump to 2002H which add B with A again
2005			08	Lower order of 2008H
2006			20	Higher order of 2008H

The Decrement DCR will Decrement the C register if the C register is zero further decrement will not take place then the zero flag will become 1.
Then the JNZ will not jump to ADD

Reference: Click here

GATE 2002 Questions on Micro processor

Two mark questions:

Question 1:

Consider the following assembly language program.

1		MVI	B,87H
2		MOV	A, B
3	START:	JMP	NEXT
4		MVI	B, 00H
5		XRA	B
6		OUT	PORT 1
7		HLT
8	NEXT:	XRA	B
9		JP	START
10		OUT	PORT 2
11		HLT

The execution of the above program in an 8085 microprocessor will result in

(a) an output of 87H at PORT1
(b) an output of 87H at PORT2
(c) infinite looping of the program execution with accumulator data remaining at 00H.
(d) infinite looping of the program execution with accumulator data alternating between 00H and 87H.

Answer: (b)

Explanation:

1. MVI command moves or stores the 87H(10000111H) to the B Register
2. MOV A, B moves the content of B Register to the A Register
       Now Accumulator will contain 87H (10000111H)
        and B register will contain 87H(10000111H)

3. JMP NEXT will be executed so the program will be jumped to NEXT(8th command). In that XRA B (Accumulator will be Exor-ed with B register and store the output in Accumulato).

A ==> 10000111H
B ==> 10000111H
------------------------------- After XRA B command
A ==> 00000000H

Sign Flag will be 0 (+ve)

4. The next "JP START" will jump to start only when the sign flag is zero. since the sign flag is zero it will jump to START that is 3rd command"JMP NEXT".
5. After JMP NEXT was jumped to NEXT. XRA B command will be executed.
(currently)
A ==> 00000000H
B ==> 10000111H
-------------------------------After XRA B command
A ==> 10000111H (87H)

sign flag will be 1 (-ve)
 so JP START will not be executed.

6. The output 87H will be at PORT 2 .

(b) an output of 87H at PORT 2.

GATE 2000 Questions on Micro processor

One mark questions:

Question 1:

The number of hardware interrupts (which require an external signal to interrupt) to present in an 8085 microprocessor are

(a)   1
(b)   4
(c)   5
(d)   13

Answer: 5

Brief:
1. TRAP
2. RST 7.5
3. RST 6.5
4. RST 5.5
5. INTR

Explanation::https://docs.google.com/file/d/0B_-K2XS49Uc5SkgxSXFmcUU1R2M/edit?usp=sharing

Question 2:

In the 8085 microprocessor, the RST6 instruction transfers the program execution to the following location:

(a) 30H      (b) 24H     (c) 48H     (d) 60H

Answer: 30H

Explanation: Given in the above document Page no:13

Two mark questions:

Question 3:

The contents of Register (B) and Accumulator (A) of 8085 microprocessor are 49H and 3AH respectively. The contents of A and the status of carry flag (CY) and sign flag (S) after executing SUB B instructions are

(a) A=F1, CY=1, S=1
(b) A=0F, CY=1, S=1
(c) A=F0, CY=0, S=0
(d) A=1F, CY=1, S=1

Answer: (a) A=F1, CY=1, S=1

Explanation:

(A) => 3AH => 00111010
(B) => 49H => 01001001
                         ------------------
                          11110001
(A) => F1H
(CY) => 1
(S) => 1

The carry flag is set since the first operand is less than the second operand.
Since the result produces the negative result sign flag is set

Explanation Reference click here
                      

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